TEA1750_2
?NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02  15 December 2008
7 of 29
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
7.1.2   Supply management
All internal reference voltages are derived from a temperature compensated and trimmed
on-chip band gap circuit. Internal reference currents are derived from a temperature
compensated and trimmed on-chip current reference circuit.
7.1.3   Latch input
Pin LATCH is a general purpose input pin, which can be used to switch off both
converters. The pin sources a current, I
O(LATCH)
 on pin LATCH (typ 80 礎). Switching of
both converters is stopped as soon as the voltage on this pin drops below 1.25 V.
At initial start-up, switching is inhibited until the voltage on the LATCH pin is above 1.35 V
(typ). No internal ltering is done on this pin. An internal Zener clamp of 2.7 V (typ)
protects this pin from excessive voltages.
Fig 4.    Start-up sequence, normal operation, and re-start sequence
I
HV
V
CC
LATCH
PROTECTION
PFCSENSE
PFCDRIVER
FBSENSE
FBDRIVER
FBCTRL
VOSENSE
V
out
CHARGING VCC
CAPACITOR
STARTING
CONVERTERS
NORMAL
OPERATION
PROTECTION
RESTART
soft start
soft start
VINSENSE
V
startup
V
th(UVLO)
V
trip
V
en(LATCH)
V
to(FBCTRL)
V
start(fb)
V
start(VINSENSE)
014aaa060
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